In ARM7 microcontrollers, PWM is designed as a separate module, but it has all features as general-purpose timers have; just limited pins are associated. PWM module has improved match module, allowing six single edges controlled PWM or three double-edge controlled PWM. There are seven match registers used with improved update logic.
PWM modulator has additional shadow match registers that perform the latching effect. This means that you can instantly update match registers, but new values are taking effect only at the beginning of the new cycle. This mechanism ensures that all updates are performed at the beginning of a new cycle through the latch enable register(LER). In general-purpose timers, match registers take effect immediately after they are updated.
PWM signal outputs to devise pins are traced through SR flip flops. RS flip-flops along with multiplexers allow producing the following PWM modes: single edge and dual-edge controlled PWM. In single edge mode, One match register(PWMMR0 controls the PWM cycle rate) while other match registers depending on the channel (PWMMR1…PWMMR6), control the position of the edge.
In dual-edge controlled PWM mode, there are three match registers used. PWMMR0 control PWM cycle rate and other match register pairs control both edges, allowing three dual-edge PWM outputs.
More details will be seen in future when working C examples will be provided.