Microcontrollers aren’t imaginable without interrupts. Arm isn’t exception. In earlier articles there were SWI exceptions mentioned, but there are two more sources of exceptions: IRQ(General Purpose Interrupt) and FIQ(Tast Interrupt). ARM Pin Connect Block All I/O pins of LPC2000 ARM can be multiplexed to several functions via pin select block. Pin selection bloc allows selections up to three more other functions except GPIO. Pin Connect block give flexibility to ARM MCU because each PIN can have different functionality. After reset all pins are configured as GPIO.
Power modes especially become more important where power saving is needed. All common microcontrollers have several power control modes.LPC21xx series microcontrollers have to reduced power modes: idle and power-down mode. In idle mode execution of instructions is suspended until reset or other interrupt signal occurs. In idle mode peripheral devices (for instance timer) are running and may generate interrupts what causes processor to resume execution. So idle mode eliminates power used by processor itself, memory system, and internal buses. When power-down mode is selected, then oscillator is topped so chip doesn't receive internal clocks. After this mode is selected, all current register and memory values are preserved, all logic levels of chip remains static. Processor may be resumed by reset signal or by other external interrupt which doesn't require internal clocking (in our case it would be External interrupt). Power down mode reduces chip power consumption to nearly zero. Entering to power down mode or to idle mode is done via software, while resuming is done automatically by interrupt. Resuming is performed such way that no instructions or any data is lost. There is also possible to turn Off peripherals individually if they are not needed what allows to save…
ARM microcontrollers can be clocked im several different ways. One of the ways is to use external clock with duty cycle 50-50 and a frequency range from 1MHz to 50MHz (LPC21xx series) connected to XTAL1 pin. Other way is to connect External crystal oscillator, but its range is lower (1MHz to 30MHz for LPC21xx series). And last but not least is on-chip PLL oscillator, then external clock source frequency should not exceed range from 10MHz to 25MHz. Lets analyse more deeply each clocking mechanism. In the picture above there is fosc selection diagram shown.
All flash memory of LPC2000series microcontrollers is arranged as two interleaved banks. But user sees it as one memory space. All flash memory appears to user as series of 8K sectors. These sectors can be written and erased individually. There are several methods how flash memory of ARM can be programmed. One and easiest way is to use built in bootloader. The code is downloaded by bootloader via USART0 to RAM and then it is programmed to Flash. There is a tool for this – Philips ISP Utility that works under Windows environment. Another method is to use JTAG to program flash memory. This method is usually used from debugging environment. JTAG is faster than ISP – reaches up to 400kB/s. Third method is ability to reprogram Flash memory sectors using application commands that are on chip. This feature is handy for updating code in a given sections. This is so called Field Updating.
We know that ARM MCU core can run at speed line 60Mhz or even more than 100Mhz. But usually ARM program is located in Flash memory. But flash memory execution speed can reach only up to20MHz. Practically speaking Flash memory is 3 – 4 times slower than ARM core speed can run. Of course one of workarounds could be loading critical program parts to RAM, but RAM is limited resource – we cannot locate all program to RAM as it is needed for data storing and so on. So second option is to have on chip cash memory, which stands between CPU and memory. Well LPC2000 and other ARM7 families have reduced cache module so called Memory acceleration module (MAM). Without going too deep on how MAM works, I ca say that basically acceleration works by loading four ARM instruction at same time from Flash (Eight THUMB instructions). If ARM is running at speed of 60MHz then there would be 3 access cycles to flash needed. MAM loads these instructions at one cycle. Usually MAM module is disabled after MCU reset. There can be three working modes of memory Acceleration Module:
Arm microcontrollers have linear memory organisation. Starting form 0x00000000 address to 0x40000000 is Internal Flash memory location. From 0x40000000 to 0x7FFFFFFF is on chip RAM memory space. As we know manu ARM families like LPC2000 series MCU is preprogrammed with flash boot-loader and ARM real monitor debug, so both are placed at location starting from 0x7FFFFFFF to 0x80000000 memory location. Address space from 0x80000000 to 0xE0000000 is reserved for external memory.
ARM MCU has multiple bus structure. There are two types of Busses in ARM7 microcontroller – Advanced High performance BUS (AHB) and VPB bus. AHB is fast bus which is clocked directly by PLL and works at same speed as ARM core. So to AHB bus ARM core and Interrupt controller are directly connected while other peripherals are connected through VPB divider. VPB divider is capable to divide speed of AHB by 1; 2 and 4. so this means if VPB bus divider will be set to 4 and CPI core speed will be 60MHz, then MCU timer will run at speed 60/4=15MHz.