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ARM7 exception modes

This is an important part of understanding ARM operation modes and handling them. ARM7 supports seven types (0x00000014 address is reserved) of exceptions:


As you can see in the table each exception has its own name and fixed address so called exception vectors. When exception occurs, execution is forced from fixed memory address corresponding to the type of exception. When exception occurs R14 and SPSR registers acts like this:

R14_<mode>=return link(PC+4);


CPSR[4:0]=exception mode number;

//execute in ARM state


//disable fast interrupts

if (<mode>==reset or FIQ) CPSR[6]=1;

//disable normal interrupts


PC=mode vector address

Each exception has priorities. Table bellow shows how priorities are assigned to exceptions:


Note. All chip peripherals are served as FIQ and IRQ. More deeply about exceptions and priorities will be in practical examples later.

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